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Semantics of Remote Direct Memory Access: Operational and Declarative Models of RDMA on TSO Architectures

https://doi.org/10.1145/3689781
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Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-3-030-99336-8_9openalex-snapshot
View-Based Owicki–Gries Reasoning for Persistent x86-TSO
inferredcites →https://doi.org/10.1007/978-3-319-89884-1_33openalex-snapshot
On Parallel Snapshot Isolation and Release/Acquire Consistency
inferredcites →https://doi.org/10.1007/978-3-642-31424-7_36openalex-snapshot
An Axiomatic Memory Model for POWER Multiprocessors
inferredcites →https://doi.org/10.1007/978-3-642-37036-6_29openalex-snapshot
Checking and Enforcing Robustness against TSO
inferredcites →https://doi.org/10.1007/978-3-662-46669-8_13openalex-snapshot
The Best of Both Worlds: Trading Efficiency and Optimality in Fence Insertion for TSO
inferredcites →https://doi.org/10.1109/40.671404openalex-snapshot
The Virtual Interface Architecture
inferredcites →https://doi.org/10.1109/hoti.2015.22openalex-snapshot
Intel® Omni-path Architecture: Enabling Scalable, High Performance Fabrics
inferredcites →https://doi.org/10.1109/hoti.2019.00017openalex-snapshot
Abstract - HOTI 2019: Compute Express Link
inferredcites →https://doi.org/10.1109/tc.1979.1675439openalex-snapshot
How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs
inferredcites →https://doi.org/10.1145/1040305.1040336openalex-snapshot
The Java memory model
inferredcites →https://doi.org/10.1145/1785414.1785443openalex-snapshot
x86-TSO
inferredcites →https://doi.org/10.1145/1926385.1926394openalex-snapshot
Mathematizing C++ concurrency
inferredcites →https://doi.org/10.1145/1993498.1993520openalex-snapshot
Understanding POWER multiprocessors
inferredcites →https://doi.org/10.1145/2541940.2541965openalex-snapshot
Scale-out NUMA
inferredcites →https://doi.org/10.1145/2627752openalex-snapshot
Herding Cats
inferredcites →https://doi.org/10.1145/2785956.2787484openalex-snapshot
Congestion Control for Large-Scale RDMA Deployments
inferredcites →https://doi.org/10.1145/2815400.2815419openalex-snapshot
Fast in-memory transaction processing using RDMA and HTM
inferredcites →https://doi.org/10.1145/2837614.2837615openalex-snapshot
Modelling the ARMv8 architecture, operationally: concurrency and ISA
inferredcites →https://doi.org/10.1145/2837614.2837616openalex-snapshot
A concurrency semantics for relaxed atomics that permits optimisation and avoids thin-air executions
inferredcites →https://doi.org/10.1145/2914770.2837643openalex-snapshot
Taming release-acquire consistency
inferredcites →https://doi.org/10.1145/2983990.2983997openalex-snapshot
An operational semantics for C/C++11 concurrency
inferredcites →https://doi.org/10.1145/3022671.2984033openalex-snapshot
Modeling and analysis of remote memory access programming
inferredcites →https://doi.org/10.1145/3062341.3062352openalex-snapshot
Repairing sequential consistency in C/C++11
inferredcites →https://doi.org/10.1145/3093333.3009850openalex-snapshot
A promising semantics for relaxed-memory concurrency
inferredcites →https://doi.org/10.1145/3098583.3098588openalex-snapshot
RoCE Rocks without PFC
inferredcites →https://doi.org/10.1145/3158107openalex-snapshot
Simplifying ARM concurrency: multicopy-atomic axiomatic and operational models for ARMv8
inferredcites →https://doi.org/10.1145/3264413openalex-snapshot
Enabling highly scalable remote memory access programming with MPI-3 one sided
inferredcites →https://doi.org/10.1145/3276507openalex-snapshot
Persistence semantics for weak memory: integrating epoch persistency with the TSO memory model
inferredcites →https://doi.org/10.1145/3290382openalex-snapshot
Bridging the gap between programming languages and hardware weak memory models
inferredcites →https://doi.org/10.1145/3290383openalex-snapshot
Grounding thin-air reads with event structures
inferredcites →https://doi.org/10.1145/3293611.3331601openalex-snapshot
The Impact of RDMA on Agreement
inferredcites →https://doi.org/10.1145/3296957.3177156openalex-snapshot
Frightening Small Children and Disconcerting Grown-ups
inferredcites →https://doi.org/10.1145/3314221.3314624openalex-snapshot
Promising-ARM/RISC-V: a simpler and faster operational concurrency model
inferredcites →https://doi.org/10.1145/3360561openalex-snapshot
Weak persistency semantics from the ground up: formalising the persistency semantics of ARMv8 and transactional models
inferredcites →https://doi.org/10.1145/3360568openalex-snapshot
A formalization of Java’s concurrent access modes
inferredcites →https://doi.org/10.1145/3371079openalex-snapshot
Persistency semantics of the Intel-x86 architecture
inferredcites →https://doi.org/10.1145/3385412.3385966openalex-snapshot
Decidable verification under a causally consistent shared memory
inferredcites →https://doi.org/10.1145/3385412.3386010openalex-snapshot
Promising 2.0: global optimizations in relaxed memory concurrency
inferredcites →https://doi.org/10.1145/3428219openalex-snapshot
Persistent Owicki-Gries reasoning: a program logic for reasoning about persistent programs on Intel-x86
inferredcites →https://doi.org/10.1145/3434324openalex-snapshot
PerSeVerE: persistency semantics for verification under ext4
inferredcites →https://doi.org/10.1145/3434328openalex-snapshot
Taming x86-TSO persistency
inferredcites →https://doi.org/10.1145/3434337openalex-snapshot
Deciding reachability under persistent x86-TSO
inferredcites →https://doi.org/10.1145/3453483.3454027openalex-snapshot
Revamping hardware persistency models: view-based and axiomatic persistency models for Intel-x86 and Armv8
inferredcites →https://doi.org/10.1145/3458926openalex-snapshot
Armed Cats
inferredcites →https://doi.org/10.1145/3498683openalex-snapshot
Extending Intel-x86 consistency and persistency: formalising the semantics of Intel-x86 memory types and non-temporal stores
inferredcites →https://doi.org/10.17487/rfc5040openalex-snapshot
A Remote Direct Memory Access Protocol Specification
inferredcites →https://doi.org/10.4230/darts.6.2.4openalex-snapshot
Reconciling Event Structures with Modern Multiprocessors (Artifact)
inferredcites →https://doi.org/10.4230/lipics.ecoop.2017.22openalex-snapshot
Counterexamples and Proof Loophole for the C/C++ to POWER and ARMv7 Trailing-Sync Compiler Mappings
inferredcites →https://doi.org/10.4230/lipics.ecoop.2020.21openalex-snapshot
Data Consistency in Transactional Storage Systems: A Centralised Semantics
inferredcites →https://doi.org/10.48550/arxiv.1805.06196openalex-snapshot
On the Semantics of Snapshot Isolation

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-031-91118-7_3openalex-snapshot
Sufficient Conditions for Robustness of RDMA Programs
inferred← citeshttps://doi.org/10.1007/978-3-032-22720-1_3openalex-snapshot
Specifying and Verifying RDMA Synchronisation
inferred← citeshttps://doi.org/10.1007/978-3-032-26220-2_20openalex-snapshot
Reasoning over Relaxed Shared Memory Models: A Tutorial
inferred← citeshttps://doi.org/10.1007/978-3-032-32519-8_6openalex-snapshot
On the Verification Problem of Remote Direct Memory Access Programs
inferred← citeshttps://doi.org/10.1088/2631-8695/ae66a4openalex-snapshot
Serial data acceleration based on DMA technology in embedded systems and its application in capacitive sensors
inferred← citeshttps://doi.org/10.1109/icton71309.2026.11705358openalex-snapshot
Exposing RDMA Read Reordering on x86: An Empirical Litmus Test
inferred← citeshttps://doi.org/10.1109/isca66397.2026.00157openalex-snapshot
TäKōFormal: Enabling Robust Software for Programmable Memory Hierarchies
inferred← citeshttps://doi.org/10.1109/tns.2025.3594334openalex-snapshot
LWIP100: A 100 Gb/s Lightweight TCP/IP Stack for Pixel Array Detectors
inferred← citeshttps://doi.org/10.1145/3721145.3725748openalex-snapshot
DREAM: Device-Driven Efficient Access to Virtual Memory
inferred← citeshttps://doi.org/10.1145/3776713openalex-snapshot
A Verified High-Performance Composable Object Library for Remote Direct Memory Access
inferred← citeshttps://doi.org/10.1145/3786582.3786821openalex-snapshot
Beyond Spec Conformance: A Logic for Validating Stakeholder Expectations
inferred← citeshttps://doi.org/10.1145/3839465openalex-snapshot
A Formal Account of the Wasm 3.0 Concurrency Model
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