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A Uniform Architecture Design for Accelerating 2D and 3D CNNs on FPGAs

https://doi.org/10.3390/electronics8010065

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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

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ImageNet Large Scale Visual Recognition Challenge

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FaceNet: A unified embedding for face recognition and clustering

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Hand gesture recognition with 3D convolutional neural networks

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Learning Spatiotemporal Features with 3D Convolutional Networks

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VoxNet: A 3D Convolutional Neural Network for real-time object recognition

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Faster R-CNN: Towards Real-Time Object Detection with Region Proposal Networks

inferredcites →https://doi.org/10.1145/2647868.2654889openalex-snapshot

Caffe

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Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks

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Going Deeper with Embedded FPGA Platform for Convolutional Neural Network

inferredcites →https://doi.org/10.1145/2847263.2847276openalex-snapshot

Throughput-Optimized OpenCL-based FPGA Accelerator for Large-Scale Convolutional Neural Networks

inferredcites →https://doi.org/10.1145/3020078.3021698openalex-snapshot

Improving the Performance of OpenCL-based FPGA Accelerator for Convolutional Neural Network

inferredcites →https://doi.org/10.1145/3020078.3021727openalex-snapshot

Frequency Domain Acceleration of Convolutional Neural Networks on CPU-FPGA Shared Memory System

inferredcites →https://doi.org/10.1145/3020078.3021736openalex-snapshot

Optimizing Loop Operation and Dataflow in FPGA Acceleration of Deep Convolutional Neural Networks

inferredcites →https://doi.org/10.1145/3020078.3021738openalex-snapshot

An OpenCL™ Deep Learning Accelerator on Arria 10

inferredcites →https://doi.org/10.1145/3065386openalex-snapshot

ImageNet classification with deep convolutional neural networks

inferredcites →https://doi.org/10.1145/3174243.3174257openalex-snapshot

Towards a Uniform Template-based Architecture for Accelerating 2D and 3D CNNs on FPGA

inferredcites →https://doi.org/10.1145/3186332openalex-snapshot

Toolflows for Mapping Convolutional Neural Networks on FPGAs

inferredcites →https://doi.org/10.23919/fpl.2017.8056779openalex-snapshot

F-C3D: FPGA-based 3-dimensional convolutional neural network

inferredcites →https://doi.org/10.4230/lipics.ecoop.2020.15openalex-snapshot

Static Analysis of Shape in TensorFlow Programs

inferredcites →https://doi.org/10.48550/arxiv.1212.0402openalex-snapshot

UCF-101: A dataset of 101 human actions classes from videos in the wild

inferredcites →https://doi.org/10.48550/arxiv.1408.5093openalex-snapshot

Caffe: Convolutional Architecture for Fast Feature Embedding

inferredcites →https://doi.org/10.48550/arxiv.1409.1556openalex-snapshot

Very Deep Convolutional Networks for Large-Scale Image Recognition

inferredcites →https://doi.org/10.48550/arxiv.1603.04467openalex-snapshot

TensorFlow: Large-Scale Machine Learning on Heterogeneous Distributed Systems

inferredcites →https://doi.org/10.48550/arxiv.1806.01683openalex-snapshot

Accelerating CNN inference on FPGAs: A Survey

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Communication subspaces align with training in ANNs

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fpgaHART: A Toolflow for Throughput-Oriented Acceleration of 3D CNNs for HAR onto FPGAs

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Configurable 2D–3D CNNs Accelerator for FPGA-Based Hyperspectral Imagery Classification

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FPGA implementation of a Convolutional Neural Network for Alzheimer's disease classification

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High-Performance Acceleration of 2-D and 3-D CNNs on FPGAs Using Static Block Floating Point

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VGG16 hardware design and implementation for CNN in image recognition

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Toward Multi-FPGA Acceleration of the Neural Networks

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Data and Computation Reuse in CNNs Using Memristor TCAMs

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Mobile-3DCNN: An Acceleration Framework for Ultra-Real-Time Execution of Large 3D CNNs on Mobile Devices

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A Survey of FPGA-based 3D CNN Accelerators and Hardware-aware Algorithmic Optimizations

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Exploration of Memory Access Optimization for FPGA-based 3D CNN Accelerator

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FPGA-Based Design for Accelerating 3D Convolutional Neural Networks

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Embedded Plant Disease Recognition Using Deep PlantNet on FPGA-SoC

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Optimized Compression for Implementing Convolutional Neural Networks on FPGA

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