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Geometrical tools to map systems of affine recurrence equations on regular arrays

https://doi.org/10.1007/bf01192158
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-17943-7_133openalex-snapshot
Synthesis of systolic arrays for inductive problems
inferredcites →https://doi.org/10.1007/978-3-662-25209-3_17openalex-snapshot
Affine Timings for Systems of Affine Recurrence Equations
inferredcites →https://doi.org/10.1007/bf00930616openalex-snapshot
Calculus of space-optimal mappings of systolic algorithms on processor arrays
inferredcites →https://doi.org/10.1007/bf01558666openalex-snapshot
Synthesizing systolic arrays with control signals from recurrence equations
inferredcites →https://doi.org/10.1007/bf02253318openalex-snapshot
A systolic array algorithm for the algebraic path problem (shortest paths; Matrix inversion)
inferredcites →https://doi.org/10.1007/bf02477176openalex-snapshot
The mapping of linear recurrence equations on regular arrays
inferredcites →https://doi.org/10.1007/bfb0040399openalex-snapshot
Converting affine recurrence equations to quasi-uniform recurrence equations
inferredcites →https://doi.org/10.1016/0167-8191(92)90077-kopenalex-snapshot
Synthesis of size-optimal toroïdal arrays for the Algebraic Path Problem: A new contribution
inferredcites →https://doi.org/10.1016/0304-3975(93)90326-oopenalex-snapshot
Computability of recurrence equations
inferredcites →https://doi.org/10.1057/jors.1987.94openalex-snapshot
Theory of Linear and Integer Programming
inferredcites →https://doi.org/10.1109/5.4402openalex-snapshot
Regular iterative algorithms and their implementation on processor arrays
inferredcites →https://doi.org/10.1109/arrays.1988.18077openalex-snapshot
Scheduling a system of affine recurrence equations onto a systolic array
inferredcites →https://doi.org/10.1109/asap.1990.145438openalex-snapshot
Calculus of space-optimal mappings of systolic algorithms on processor arrays
inferredcites →https://doi.org/10.1109/icassp.1985.1168513openalex-snapshot
Systematic approaches to the design of algorithmically specified systolic arrays
inferredcites →https://doi.org/10.1109/ipps.1991.153840openalex-snapshot
A geometrical coding to compile affine recurrence equations on regular arrays
inferredcites →https://doi.org/10.1109/mc.1982.1653825openalex-snapshot
Why systolic architectures?
inferredcites →https://doi.org/10.1109/proc.1983.12532openalex-snapshot
On the design of algorithms for VLSI systolic arrays
inferredcites →https://doi.org/10.1109/tc.1986.1676652openalex-snapshot
Partitioning and Mapping Algorithms into Fixed Size Systolic Arrays
inferredcites →https://doi.org/10.1109/tc.1987.1676945openalex-snapshot
Optimal Systolic Design for the Transitive Closure and the Shortest Path Problems
inferredcites →https://doi.org/10.1145/321406.321418openalex-snapshot
The Organization of Computations for Uniform Recurrence Equations
inferredcites →https://doi.org/10.1145/773453.808184openalex-snapshot
Automatic synthesis of systolic arrays from uniform recurrent equations
inferredcites →https://doi.org/10.2307/2312260openalex-snapshot
A New Version of the Euclidean Algorith
inferredcites →https://doi.org/10.2307/253980openalex-snapshot
Theory of Linear and Integer Programming

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

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A specialized hardware device for the protein similarity search
inferred← citeshttps://doi.org/10.1007/3-540-45492-6_33openalex-snapshot
High Level Software Synthesis of Affine Iterative Algorithms onto Parallel Architectures
inferred← citeshttps://doi.org/10.1007/bf00924526openalex-snapshot
Linear mappings ofn-dimensional uniform recurrences ontok-dimensional systolic arrays
inferred← citeshttps://doi.org/10.1007/bfb0002778openalex-snapshot
Typechecking of Pei expressions
inferred← citeshttps://doi.org/10.1007/bfb0046638openalex-snapshot
A toolbox for affine recurrence equations parallelization
inferred← citeshttps://doi.org/10.1016/0167-9260(95)00018-6openalex-snapshot
Communication code generation in systems of affine recurrence equations
inferred← citeshttps://doi.org/10.1016/b978-044482106-5/50030-2openalex-snapshot
From Dependence Analysis to Communication Code Generation
inferred← citeshttps://doi.org/10.1016/s0010-4655(01)00224-7openalex-snapshot
Dedicated hardware for linearly-scaling algorithms in condensed-matter physics
inferred← citeshttps://doi.org/10.1016/s0010-4655(01)00234-xopenalex-snapshot
Automatic implementation of affine iterative algorithms: Design flow and communication synthesis
inferred← citeshttps://doi.org/10.1016/s0129-6264(00)00018-4openalex-snapshot
Memory Cost Due to Anticipated Broadcast
inferred← citeshttps://doi.org/10.1016/s0747-7171(06)80005-2openalex-snapshot
Synthesis aspects in the design of efficient processor arrays from affine recurrence equations
inferred← citeshttps://doi.org/10.1023/a:1025165407063openalex-snapshot
Affine Dependence Classification for Communications Minimization
inferred← citeshttps://doi.org/10.1109/32.842951openalex-snapshot
Automatic mapping of system of N-dimensional affine recurrence equations (SARE) onto distributed memory parallel systems
inferred← citeshttps://doi.org/10.1109/asap.1994.331802openalex-snapshot
Data compiling for systems of affine recurrence equations
inferred← citeshttps://doi.org/10.1109/hcw.2000.843729openalex-snapshot
Heterogeneity as key feature of high performance computing: the PQE1 prototype
inferred← citeshttps://doi.org/10.1109/ipdps.2002.1016550openalex-snapshot
High level synthesis for programmable devices: the HADES project
inferred← citeshttps://doi.org/10.1109/ipdps.2003.1213292openalex-snapshot
PROSIDIS: a special purpose processor for protein similarity discovery
inferred← citeshttps://doi.org/10.1109/ipps.1991.153840openalex-snapshot
A geometrical coding to compile affine recurrence equations on regular arrays
inferred← citeshttps://doi.org/10.1109/ipps.1999.760537openalex-snapshot
A new memory-saving technique to map system of affine recurrence equations (SARE) onto distributed memory systems
inferred← citeshttps://doi.org/10.1142/s0129626400000184openalex-snapshot
MEMORY COST DUE TO ANTICIPATED BROADCAST
inferred← citeshttps://doi.org/10.1145/582034.582063openalex-snapshot
Parallel dedicated hardware devices for heterogeneous computations
inferred← citeshttps://doi.org/10.5555/224659.224723openalex-snapshot
Mappings for communication minimization using distribution and alignment
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