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Formal verification of hardware correctness: introduction and survey of current research
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Outgoing claims: the papers this work cites, builds on, or argues with.
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FM8501: A Verified Microprocessor
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Formal Verification of Circuit Designs
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Temporal logic based hardware description and its verification with Prolog
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Verify: A program for proving correctness of digital hardware designs
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Specification and verification of digital systems using higher-order predicate logic
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Symbolic Simulation for Correct Machine Design
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The Application of Program Verification to Hardware Verification
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Symbolic Simulation for Functional Verification with ADLIB and SDL
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A Formal Design Verification System Based on an Automated Reasoning System
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Application of temporal logic to the assistance of hardware logic design
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A Temporal Logic for Multilevel Reasoning about Hardware
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Concurrent Prolog as an Efficient VLSI Design Language
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Hardware Specification with Temporal Logic: An Example
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Equivalence of the Arbiter, the Synchronizer, the Latch, and the Inertial Delay
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An Abstract Model of Behavior for Hardware Descriptions
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Verification of Register Transfer Level Parallel Control Sequences
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Automatic Verification of Sequential Circuits Using Temporal Logic
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A Formal Design Verification System Based on an Automated Reasoning System
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Symbolic Simulation for Functional Verification with ADLIB and SDL
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Verification of hardware designs thru symbolic manipulation
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Symbolic Simulation for Correct Machine Design
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The application of program verification techniques to hardware verification
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