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Functional Coverage Driven Test Generation for Validation of Pipelined Processors
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/3-540-44585-4_40openalex-snapshot
Microarchitecture Verification by Compositional Model Checking
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Formal Verification of Complex Out-of-Order Pipelines by Combining Model-Checking and Theorem-Proving
inferredcites →https://doi.org/10.1007/b117979openalex-snapshot
Functional Verification Coverage Measurement and Analysis
inferredcites →https://doi.org/10.1007/bfb0028737openalex-snapshot
Formal verification of out-of-order execution using incremental flushing
inferredcites →https://doi.org/10.1109/54.936247openalex-snapshot
Coverage metrics for functional validation of hardware designs
inferredcites →https://doi.org/10.1109/ats.1994.367216openalex-snapshot
Automatic test generation for functional verification of microprocessors
inferredcites →https://doi.org/10.1109/dac.1999.781305openalex-snapshot
Micro architecture coverage directed generation of test programs
inferredcites →https://doi.org/10.1109/dac.2003.1219010openalex-snapshot
Coverage directed test generation for functional verification using Bayesian networks
inferredcites →https://doi.org/10.1109/dac.2003.1219068openalex-snapshot
A scalable software-based self-test methodology for programmable processors
inferredcites →https://doi.org/10.1109/date.2003.1253736openalex-snapshot
Fully automatic test program generation for microprocessor cores
inferredcites →https://doi.org/10.1109/date.2004.1268846openalex-snapshot
Graph-based functional test program generation for pipelined processors
inferredcites →https://doi.org/10.1109/date.2006.244078openalex-snapshot
Functional Test Generation using Property Decompositions for Validation of Pipelined Processors
inferredcites →https://doi.org/10.1109/hldvt.2002.1224436openalex-snapshot
Automatic functional test program generation for pipelined processors using model checking
inferredcites →https://doi.org/10.1109/isca.1995.524579openalex-snapshot
Architecture validation for processors
inferredcites →https://doi.org/10.1109/mdt.2004.1277906openalex-snapshot
Safety property verification using sequential SAT and bounded model checking
inferredcites →https://doi.org/10.1109/tc.1980.1675602openalex-snapshot
Test Generation for Microprocessors
inferredcites →https://doi.org/10.1145/196244.196577openalex-snapshot
Automatic verification of pipelined microprocessors
inferredcites →https://doi.org/10.1145/217474.217542openalex-snapshot
Test program generation for functional verification of PowerPC processors in IBM
inferredcites →https://doi.org/10.1145/223982.224450openalex-snapshot
Architecture validation for processors
inferredcites →https://doi.org/10.1145/288548.289082openalex-snapshot
Formal verification of pipeline control using controlled token nets and abstract interpretation
inferredcites →https://doi.org/10.1145/309847.309908openalex-snapshot
Functional verification of the equator MAP1000 microprocessor
inferredcites →https://doi.org/10.1145/309847.309909openalex-snapshot
Micro architecture coverage directed generation of test programs
inferredcites →https://doi.org/10.1145/309847.309912openalex-snapshot
High-level test generation for design verification of pipelined microprocessors
inferredcites →https://doi.org/10.1145/378239.379072openalex-snapshot
A new verification methodology for complex pipeline behavior
inferredcites →https://doi.org/10.1145/500001.500061openalex-snapshot
Functional abstraction driven design space exploration of heterogeneous programmable architectures
inferredcites →https://doi.org/10.1145/775832.775907openalex-snapshot
Coverage directed test generation for functional verification using bayesian networks
inferredcites →https://doi.org/10.1145/775832.775973openalex-snapshot
A scalable software-based self-test methodology for programmable processors
inferredcites →https://doi.org/10.1145/996566.996578openalex-snapshot
Industrial experience with test generation languages for processor verification
inferredcites →https://doi.org/10.5555/191326.191566openalex-snapshot
Automatic test program generation for pipelined processors
inferredcites →https://doi.org/10.5555/968878.969048openalex-snapshot
Using counter example guided abstraction refinement to find complex bugs
inferredcites →https://doi.org/10.5555/968878.969066openalex-snapshot
Graph-based functional test program generation for pipelined processors
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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Language-driven Exploration and Implementation of Partially Re-configurable ASIPs
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Test Generation Using Design and Property Decompositions
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SoC Security Verification Challenges
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Automated Test Generation for Detection of Malicious Functionality
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Pipeline Verification via Closed-Loop Feedback
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Architecture Description Languages
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Efficient test case generation for validation of UML activity diagrams
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A Functional Verification Methodology Based on Parameter Domains for Efficient Input Stimuli Generation and Coverage Modeling
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Processor Description Languages
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Functional verification
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Random test program generation for verification and validation of the Samsung Reconfigurable Processor
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Architecture description languages for programmable embedded systems
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Automated Test Generation for Activation of Assertions in RTL Models
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RTL Regression Test Selection using Machine Learning
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Clock Domain Crossing Fault Model and Coverage Metric for Validation of SoC Design
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Design Fault Directed Test Generation for Microprocessor Validation
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Towards coverage closure: Using GoldMine assertions for generating design validation stimulus
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Functional validation of programmable architectures
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Functional validation of programmable architectures
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Improving Coverage of Simulation-Based Verification by Dedicated Stimuli Generation
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Coverage-directed verification of microprocessor units based on cycle-accurate contract specifications
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Model-driven test generation for system level validation
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Coverage-directed test generation through automatic constraint extraction
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Semi-formal functional verification by EFSM traversing via NuSMV
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Online selection of effective functional test programs based on novelty detection
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An Analytical Study on Machine Learning Approaches for Simulation-Based Verification
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Achieving Last-Mile Functional Coverage in Testing Chip Design Software Implementations
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