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Formal verification of out-of-order execution using incremental flushing
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
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Automatic verification of pipelined microprocessor control
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PVS: Combining specification, proof checking, and model checking
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Trace table based approach for pipelined microprocessor verification
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Verifying Out-of-Order Executions
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Verification of an implementation of Tomasulo's algorithm by compositional model checking
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Decomposing the proof of correctness of pipelined microprocessors
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Processor verification with precise exceptions and speculative execution
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You assume, we guarantee: Methodology and case studies
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Validity checking for combinations of theories with equality
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Mechanically checking a lemma used in an automatic verification tool
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The existence of refinement mappings
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Refinement with global equivalence proofs in temporal logic
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Efficient validity checking for processor verification
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Techniques for verifying superscalar microprocessors
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An Efficient Algorithm for Exploiting Multiple Arithmetic Units
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Efficient validity checking for processor verification
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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