On the public citation graph

Elastic-Cache: GPU Cache Architecture for Efficient Fine- and Coarse-Grained Cache-Line Management

0 signed · 32 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1109/hpca.2014.6835938openalex-snapshot
MRPB: Memory request prioritization for massively parallel processors
inferredcites →https://doi.org/10.1109/iiswc.2009.5306797openalex-snapshot
Rodinia: A benchmark suite for heterogeneous computing
inferredcites →https://doi.org/10.1109/iiswc.2012.6402918openalex-snapshot
A quantitative study of irregular programs on GPUs
inferredcites →https://doi.org/10.1109/iiswc.2014.6983053openalex-snapshot
Graph processing on GPUs: Where are the bottlenecks?
inferredcites →https://doi.org/10.1109/ispass.2009.4919648openalex-snapshot
Analyzing CUDA workloads using a detailed GPU simulator
inferredcites →https://doi.org/10.1109/lca.2014.2359882openalex-snapshot
Adaptive Cache and Concurrency Allocation on GPGPUs
inferredcites →https://doi.org/10.1109/micro.2012.16openalex-snapshot
Cache-Conscious Wavefront Scheduling
inferredcites →https://doi.org/10.1109/micro.2012.18openalex-snapshot
Unifying Primary Cache, Scratch, and Register File Memories in a Throughput Processor
inferredcites →https://doi.org/10.1109/micro.2012.42openalex-snapshot
Amoeba-Cache: Adaptive Blocks for Eliminating Waste in the Memory Hierarchy
inferredcites →https://doi.org/10.1109/micro.2014.11openalex-snapshot
Adaptive Cache Management for Energy-Efficient GPU Computing
inferredcites →https://doi.org/10.1109/sc.2014.16openalex-snapshot
Managing DRAM Latency Divergence in Irregular GPGPU Applications
inferredcites →https://doi.org/10.1145/1454115.1454152openalex-snapshot
Mars
inferredcites →https://doi.org/10.1145/1815961.1815992openalex-snapshot
Dynamic warp subdivision for integrated branch and memory divergence tolerance
inferredcites →https://doi.org/10.1145/2370816.2370858openalex-snapshot
Shared memory multiplexing
inferredcites →https://doi.org/10.1145/2540708.2540717openalex-snapshot
A locality-aware memory hierarchy for energy-efficient GPU architectures
inferredcites →https://doi.org/10.1145/2540708.2540718openalex-snapshot
Divergence-aware warp scheduling
inferredcites →https://doi.org/10.1147/jrd.2014.2376112openalex-snapshot
IBM POWER8 processor core microarchitecture
inferredcites →https://doi.org/10.1147/sj.71.0015openalex-snapshot
Structural aspects of the System/360 Model 85, II: The cache

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-319-96983-1_17openalex-snapshot
Improving GPU Cache Hierarchy Performance with a Fetch and Replacement Cache
inferred← citeshttps://doi.org/10.1007/s11227-022-04621-1openalex-snapshot
Irregular accesses reorder unit: improving GPGPU memory coalescing for graph-based workloads
inferred← citeshttps://doi.org/10.1016/j.mejo.2023.105825openalex-snapshot
Re-Cache: Mitigating cache contention by exploiting locality characteristics with reconfigurable memory hierarchy for GPGPUs
inferred← citeshttps://doi.org/10.1016/j.micpro.2021.104301openalex-snapshot
Virtual-Cache: A cache-line borrowing technique for efficient GPU cache architectures
inferred← citeshttps://doi.org/10.1016/j.parco.2026.103208openalex-snapshot
A comprehensive survey on multi-GPU systems
inferred← citeshttps://doi.org/10.1080/17445760.2023.2173752openalex-snapshot
Optimization strategies for GPUs: an overview of architectural approaches
inferred← citeshttps://doi.org/10.1109/access.2018.2818193openalex-snapshot
DyCache: Dynamic Multi-Grain Cache Management for Irregular Memory Accesses on GPU
inferred← citeshttps://doi.org/10.1109/hpca61900.2025.00055openalex-snapshot
Piccolo: Large-Scale Graph Processing with Fine-Grained in-Memory Scatter-Gather
inferred← citeshttps://doi.org/10.1109/hpcc64274.2024.00018openalex-snapshot
Pseudo-Cache: Extending the Access Scope of Requests with Global Perspective in GPUs
inferred← citeshttps://doi.org/10.1109/hpcc67675.2025.00036openalex-snapshot
BASH: A Bandwidth Sharing Mechanism for Subpartition Scheduling in GPU L2 Caches
inferred← citeshttps://doi.org/10.1109/micro56248.2022.00029openalex-snapshot
Morpheus: Extending the Last Level Cache Capacity in GPU Systems Using Idle GPU Core Resources
inferred← citeshttps://doi.org/10.1109/tc.2019.2907591openalex-snapshot
Efficient Management of Cache Accesses to Boost GPGPU Memory Subsystem Performance
inferred← citeshttps://doi.org/10.1109/tc.2019.2939809openalex-snapshot
Scrabble: A Fine-Grained Cache with Adaptive Merged Block
inferred← citeshttps://doi.org/10.5821/dissertation-2117-344358openalex-snapshot
High-performance and energy-efficient irregular graph processing on GPU architectures
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.