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Wish Branches: Combining Conditional Branching and Predication for Adaptive Predicated Execution

https://doi.org/10.1109/micro.2005.38
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What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/3-540-39999-2_8openalex-snapshot
Loop Termination Prediction
inferredcites →https://doi.org/10.1007/bf03356749openalex-snapshot
Using Predicated Execution to Improve the Performance of a Dynamically Scheduled Machine with Speculative Execution
inferredcites →https://doi.org/10.1109/2.19820openalex-snapshot
The Cydra 5 departmental supercomputer: design philosophies, decisions, and trade-offs
inferredcites →https://doi.org/10.1109/hpca.1999.744346openalex-snapshot
A study of control independence in superscalar processors
inferredcites →https://doi.org/10.1109/hpca.2001.903248openalex-snapshot
Register renaming and scheduling for dynamic execution of predicated code
inferredcites →https://doi.org/10.1109/intera.2003.1192358openalex-snapshot
A region-based compilation infrastructure
inferredcites →https://doi.org/10.1109/isca.1994.288156openalex-snapshot
Guarded execution and branch prediction in dynamic ILP processors
inferredcites →https://doi.org/10.1109/isca.1998.694785openalex-snapshot
Selective eager execution on the PolyPath architecture
inferredcites →https://doi.org/10.1109/l-ca.2002.8openalex-snapshot
MinneSPEC: A New SPEC Benchmark Workload for Simulation-Based Computer Architecture Research
inferredcites →https://doi.org/10.1109/micro.1994.717459openalex-snapshot
The effects of predicated execution on branch prediction
inferredcites →https://doi.org/10.1109/micro.1994.717461openalex-snapshot
Characterizing the impact of predicated execution on branch prediction
inferredcites →https://doi.org/10.1109/micro.1995.476841openalex-snapshot
Disjoint eager execution: an optimal form of speculative execution
inferredcites →https://doi.org/10.1109/micro.1996.566457openalex-snapshot
Assigning confidence to conditional branch predictions
inferredcites →https://doi.org/10.1109/pact.1998.727261openalex-snapshot
Dynamic hammock predication for non-predicated instruction set architectures
inferredcites →https://doi.org/10.1109/t-c.1972.223514openalex-snapshot
The Inhibition of Potential Parallelism by Conditional Jumps
inferredcites →https://doi.org/10.1109/wwc.2001.20openalex-snapshot
Runtime predictability of loops
inferredcites →https://doi.org/10.1109/wwc.2001.990748openalex-snapshot
Runtime predictability of loops
inferredcites →https://doi.org/10.1145/1064978.1065034openalex-snapshot
Pin
inferredcites →https://doi.org/10.1145/1065010.1065034openalex-snapshot
Pin
inferredcites →https://doi.org/10.1145/139669.139709openalex-snapshot
Alternative implementations of two-level adaptive branch prediction
inferredcites →https://doi.org/10.1145/191995.192022openalex-snapshot
Guarded execution and branch prediction in dynamic ILP processors
inferredcites →https://doi.org/10.1145/192724.192753openalex-snapshot
The effects of predicated execution on branch prediction
inferredcites →https://doi.org/10.1145/192724.192755openalex-snapshot
Characterizing the impact of predicated execution on branch prediction
inferredcites →https://doi.org/10.1145/192724.197407openalex-snapshot
Facilitating superscalar processing via a combined static/dynamic register renaming scheme
inferredcites →https://doi.org/10.1145/279358.279393openalex-snapshot
Selective eager execution on the PolyPath architecture
inferredcites →https://doi.org/10.1145/305138.305175openalex-snapshot
Reducing branch misprediction penalties via dynamic control independence detection
inferredcites →https://doi.org/10.1145/335231.335251openalex-snapshot
Using profiling to reduce branch misprediction costs on a dynamically scheduled processor
inferredcites →https://doi.org/10.1145/567067.567085openalex-snapshot
Conversion of control dependence to data dependence
inferredcites →https://doi.org/10.1145/782814.782840openalex-snapshot
Predicate prediction for efficient out-of-order execution
inferredcites →https://doi.org/10.1147/rd.111.0008openalex-snapshot
The IBM System/360 Model 91: Machine Philosophy and Instruction-Handling
inferredcites →https://doi.org/10.5555/225160.225208openalex-snapshot
Disjoint eager execution: an optimal form of speculative execution
inferredcites →https://doi.org/10.5555/243846.243880openalex-snapshot
Assigning confidence to conditional branch predictions
inferredcites →https://doi.org/10.5555/522344.825698openalex-snapshot
Dynamic hammock predication for non-predicated instruction set architectures
inferredcites →https://doi.org/10.5555/563998.564002openalex-snapshot
Skipper: a microarchitecture for exploiting control-flow independence
inferredcites →https://doi.org/10.5555/563998.564023openalex-snapshot
The impact of If-conversion and branch prediction on program execution on the Intel/sup R/ Itanium/sup TM/ processor

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1007/978-3-540-92990-1_24openalex-snapshot
Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures
inferred← citeshttps://doi.org/10.1007/s11390-012-1262-8openalex-snapshot
SWIP Prediction: Complexity-Effective Indirect-Branch Prediction Using Pointers
inferred← citeshttps://doi.org/10.1109/ahs.2011.5963931openalex-snapshot
A post-manufacturing language-adaptive embedded processor system
inferred← citeshttps://doi.org/10.1109/apcsac.2008.4625471openalex-snapshot
Profile guided optimization for dataflow predication
inferred← citeshttps://doi.org/10.1109/cgo.2006.1openalex-snapshot
2D-Profiling: Detecting Input-Dependent Branches with a Single Input Data Set
inferred← citeshttps://doi.org/10.1109/cgo.2007.31openalex-snapshot
Profile-assisted Compiler Support for Dynamic Predication in Diverge-Merge Processors
inferred← citeshttps://doi.org/10.1109/gcat62922.2024.10923874openalex-snapshot
SystemVerilog Based Design of an RV32I Compliant RISC-V Processor Core
inferred← citeshttps://doi.org/10.1109/hpca.2007.346186openalex-snapshot
Improving Branch Prediction and Predicated Execution in Out-of-Order Processors
inferred← citeshttps://doi.org/10.1109/hpca.2010.5416659openalex-snapshot
Value Based BTB Indexing for indirect jump prediction
inferred← citeshttps://doi.org/10.1109/hpca.2013.6522307openalex-snapshot
Store-Load-Branch (SLB) predictor: A compiler assisted branch prediction for data dependent branches
inferred← citeshttps://doi.org/10.1109/hpca.2013.6522341openalex-snapshot
How to implement effective prediction and forwarding for fusable dynamic multicore architectures
inferred← citeshttps://doi.org/10.1109/isca45697.2020.00019openalex-snapshot
Auto-Predication of Critical Branches
inferred← citeshttps://doi.org/10.1109/isca59077.2024.00091openalex-snapshot
Alternate Path Fetch
inferred← citeshttps://doi.org/10.1109/micro.2006.17openalex-snapshot
Dataflow Predication
inferred← citeshttps://doi.org/10.1109/micro.2006.20openalex-snapshot
Diverge-Merge Processor (DMP): Dynamic Predicated Execution of Complex Control-Flow Graphs Based on Frequently Executed Paths
inferred← citeshttps://doi.org/10.1109/micro.2012.38openalex-snapshot
Control-Flow Decoupling
inferred← citeshttps://doi.org/10.1109/micro.2018.00018openalex-snapshot
Architectural Support for Probabilistic Branches
inferred← citeshttps://doi.org/10.1109/mm.2006.27openalex-snapshot
Wish Branches: Enabling Adaptive and Aggressive Predicated Execution
inferred← citeshttps://doi.org/10.1109/mm.2007.9openalex-snapshot
Diverge-Merge Processor: Generalized and Energy-Efficient Dynamic Predication
inferred← citeshttps://doi.org/10.1109/tc.2007.70742openalex-snapshot
Enlarging Instruction Streams
inferred← citeshttps://doi.org/10.1109/tc.2014.2361526openalex-snapshot
Control-Flow Decoupling: An Approach for Timely, Non-Speculative Branching
inferred← citeshttps://doi.org/10.1145/1183401.1183410openalex-snapshot
Selective predicate prediction for out-of-order processors
inferred← citeshttps://doi.org/10.1145/1250662.1250716openalex-snapshot
Ginger
inferred← citeshttps://doi.org/10.1145/1250662.1250717openalex-snapshot
Transparent control independence (TCI)
inferred← citeshttps://doi.org/10.1145/1273440.1250716openalex-snapshot
Ginger
inferred← citeshttps://doi.org/10.1145/2677037openalex-snapshot
Efficient Out-of-Order Execution of Guarded ISAs
inferred← citeshttps://doi.org/10.1145/2749469.2750400openalex-snapshot
Branch vanguard
inferred← citeshttps://doi.org/10.1145/2830772.2830781openalex-snapshot
Bungee jumps
inferred← citeshttps://doi.org/10.1145/2872887.2750400openalex-snapshot
Branch vanguard
inferred← citeshttps://doi.org/10.1145/3466752.3480045openalex-snapshot
Enabling Branch-Mispredict Level Parallelism by Selectively Flushing Instructions
inferred← citeshttps://doi.org/10.21236/ada605735openalex-snapshot
The RISC-V Instruction Set Manual. Volume 1: User-Level ISA, Version 2.0
inferred← citeshttps://doi.org/10.23919/date.2018.8342015openalex-snapshot
HIPE: HMC instruction predication extension applied on database processing
inferred← citeshttps://doi.org/10.3384/diss.diva-130723openalex-snapshot
Design of Energy-Efficient High-Performance ASIP-DSP Platforms
inferred← citeshttps://doi.org/10.5821/dissertation-2117-93337openalex-snapshot
Predicated execution and register windows for out-of-order processors
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