On the public citation graph

PPEP: Online Performance, Power, and Energy Prediction Framework and DVFS Space Exploration

0 signed · 110 inferred · view as graph

Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.

Is this your work? Sign in with ORCID and put your name on the claims that are yours.
Claim with ORCID
Reference health. See whether every reference in this work resolves to a known work and none has been retracted — and get a dated CiteStamped badge you can embed.
See reference health

What this work says

Outgoing claims: the papers this work cites, builds on, or argues with.

inferredcites →https://doi.org/10.1007/978-0-387-09766-4_133openalex-snapshot
NAS Parallel Benchmarks
inferredcites →https://doi.org/10.1007/978-3-031-01741-4openalex-snapshot
The Datacenter as a Computer
inferredcites →https://doi.org/10.1007/s10586-007-0045-4openalex-snapshot
Power capping: a prelude to power shifting
inferredcites →https://doi.org/10.1109/date.2007.364517openalex-snapshot
Accurate Temperature-Dependent Integrated Circuit Leakage Power Estimation is Easy
inferredcites →https://doi.org/10.1109/hpca.2009.4798264openalex-snapshot
CAMP: A technique to estimate per-structure power at run-time using a few simple parameters
inferredcites →https://doi.org/10.1109/igcc.2011.6008552openalex-snapshot
Green governors: A framework for Continuously Adaptive DVFS
inferredcites →https://doi.org/10.1109/igcc.2011.6008553openalex-snapshot
Practical performance prediction under Dynamic Voltage Frequency Scaling
inferredcites →https://doi.org/10.1109/isca.2012.6237020openalex-snapshot
The Yin and Yang of power and performance for asymmetric hardware and managed software
inferredcites →https://doi.org/10.1109/lpe.2001.945389openalex-snapshot
Run-time power estimation in high performance microprocessors
inferredcites →https://doi.org/10.1109/micro.2003.1253186openalex-snapshot
Runtime power monitoring in high-end processors: methodology and empirical data
inferredcites →https://doi.org/10.1109/micro.2006.8openalex-snapshot
An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget
inferredcites →https://doi.org/10.1109/micro.2012.22openalex-snapshot
CoScale: Coordinating CPU and Memory System DVFS in Server Systems
inferredcites →https://doi.org/10.1109/micro.2012.23openalex-snapshot
Predicting Performance Impact of DVFS for Realistic Memory Systems
inferredcites →https://doi.org/10.1109/micro.2012.29openalex-snapshot
Accurate Fine-Grained Processor Power Proxies
inferredcites →https://doi.org/10.1109/tc.2010.65openalex-snapshot
A Counter Architecture for Online DVFS Profitability Estimation
inferredcites →https://doi.org/10.1145/1186736.1186737openalex-snapshot
SPEC CPU2006 benchmark descriptions
inferredcites →https://doi.org/10.1145/1454115.1454128openalex-snapshot
The PARSEC benchmark suite
inferredcites →https://doi.org/10.1145/1496091.1496103openalex-snapshot
The cost of a cloud
inferredcites →https://doi.org/10.1145/1534909.1534910openalex-snapshot
A mechanistic performance model for superscalar out-of-order processors
inferredcites →https://doi.org/10.1145/1577129.1577137openalex-snapshot
Real time power estimation and thread scheduling via performance counters
inferredcites →https://doi.org/10.1145/1787275.1787338openalex-snapshot
Interval-based models for run-time DVFS orchestration in superscalar processors
inferredcites →https://doi.org/10.1145/1854273.1854283openalex-snapshot
Scalable thread scheduling and global power management for heterogeneous many-core architectures
inferredcites →https://doi.org/10.1145/1950365.1950402openalex-snapshot
Looking back on the language and hardware revolutions
inferredcites →https://doi.org/10.1145/2000064.2000117openalex-snapshot
Scalable power control for many-core architectures running multi-threaded applications
inferredcites →https://doi.org/10.1145/2155620.2155641openalex-snapshot
Pack & Cap
inferredcites →https://doi.org/10.1145/2366231.2337185openalex-snapshot
The yin and yang of power and performance for asymmetric hardware and managed software
inferredcites →https://doi.org/10.1145/2370816.2370821openalex-snapshot
PGCapping
inferredcites →https://doi.org/10.1145/2485922.2485947openalex-snapshot
Cooperative boosting
inferredcites →https://doi.org/10.1145/383082.383119openalex-snapshot
Run-time power estimation in high performance microprocessors
inferredcites →https://doi.org/10.1177/109434209100500306openalex-snapshot
The NAS Parallel Benchmarks
inferredcites →https://doi.org/10.2200/s00193ed1v01y200905cac006openalex-snapshot
The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines
inferredcites →https://doi.org/10.2200/s00516ed2v01y201306cac024openalex-snapshot
The Datacenter as a Computer: An Introduction to the Design of Warehouse-Scale Machines, Second edition
inferredcites →https://doi.org/10.5555/956417.956567openalex-snapshot
Runtime power monitoring in high-end processors: methodology and empirical data

What points at this work

Incoming claims: where this work appears in other papers’ reference lists and arguments.

inferred← citeshttps://doi.org/10.1002/cpe.6205openalex-snapshot
On power capping and performance optimization of multithreaded applications
inferred← citeshttps://doi.org/10.1007/978-3-030-60939-9_13openalex-snapshot
Fine-Grained Power Modeling of Multicore Processors Using FFNNs
inferred← citeshttps://doi.org/10.1007/978-3-319-31596-6_6openalex-snapshot
Power Management of Asymmetric Multi-Cores in the Dark Silicon Era
inferred← citeshttps://doi.org/10.1007/978-3-319-54999-6_17openalex-snapshot
DVFS Space Exploration in Power Constrained Processing-in-Memory Systems
inferred← citeshttps://doi.org/10.1007/978-3-662-49283-3_3openalex-snapshot
Thermal-Aware Floorplanner for Multi-core 3D ICs with Interlayer Cooling
inferred← citeshttps://doi.org/10.1007/s10766-022-00730-9openalex-snapshot
Fine-Grained Power Modeling of Multicore Processors Using FFNNs
inferred← citeshttps://doi.org/10.1016/j.jpdc.2016.03.008openalex-snapshot
Physical-aware predictive dynamic thermal management of multi-core processors
inferred← citeshttps://doi.org/10.1016/j.suscom.2018.05.001openalex-snapshot
Program power profiling based on phase behaviors
inferred← citeshttps://doi.org/10.1109/ccgrid49817.2020.00-54openalex-snapshot
Cross Architectural Power Modelling
inferred← citeshttps://doi.org/10.1109/csiec.2016.7482121openalex-snapshot
A neuro-fuzzy fan speed controller for dynamic management of processor fan power consumption
inferred← citeshttps://doi.org/10.1109/dac.2018.8465821openalex-snapshot
STAFF: Online Learning with Stabilized Adaptive Forgetting Factor and Feature Selection Algorithm
inferred← citeshttps://doi.org/10.1109/hpca.2015.7056063openalex-snapshot
GPGPU performance and power estimation using machine learning
inferred← citeshttps://doi.org/10.1109/hpca.2017.32openalex-snapshot
Application-Specific Performance-Aware Energy Optimization on Android Mobile Devices
inferred← citeshttps://doi.org/10.1109/hpca.2017.34openalex-snapshot
Dynamic GPGPU Power Management Using Adaptive Model Predictive Control
inferred← citeshttps://doi.org/10.1109/hpca.2017.42openalex-snapshot
Design and Analysis of an APU for Exascale Computing
inferred← citeshttps://doi.org/10.1109/hpca.2018.00034openalex-snapshot
GDP: Using Dataflow Properties to Accurately Estimate Interference-Free Performance at Runtime
inferred← citeshttps://doi.org/10.1109/hpca.2018.00054openalex-snapshot
PM3: Power Modeling and Power Management for Processing-in-Memory
inferred← citeshttps://doi.org/10.1109/hpca47549.2020.00057openalex-snapshot
Techniques for Reducing the Connected-Standby Energy Consumption of Mobile Devices
inferred← citeshttps://doi.org/10.1109/hpcc-smartcity-dss.2016.0050openalex-snapshot
A Hybrid Power-Performance Adjustment Strategy for Clustered Multi-threading Architecture
inferred← citeshttps://doi.org/10.1109/iccad.2017.8203843openalex-snapshot
P 4 : Phase-based power/performance prediction of heterogeneous systems via neural networks
inferred← citeshttps://doi.org/10.1109/iccd.2015.7357121openalex-snapshot
Online mechanism for reliability and power-efficiency management of a dynamically reconfigurable core
inferred← citeshttps://doi.org/10.1109/iccd.2016.7753337openalex-snapshot
Improving performance per Watt of non-monotonic Multicore Processors via bottleneck-based online program phase classification
inferred← citeshttps://doi.org/10.1109/igcc.2016.7892614openalex-snapshot
RePP-C: Runtime estimation of performance-power with workload consolidation in CMPs
inferred← citeshttps://doi.org/10.1109/ipdps.2016.118openalex-snapshot
A Methodology for Modeling Dynamic and Static Power Consumption for Multicore Processors
inferred← citeshttps://doi.org/10.1109/ipdpsw.2017.98openalex-snapshot
A Statistical Approach to Power Estimation for x86 Processors
inferred← citeshttps://doi.org/10.1109/isca59077.2024.00063openalex-snapshot
BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs
inferred← citeshttps://doi.org/10.1109/isca66397.2026.00166openalex-snapshot
PowerGrad: Hierarchical Power Management for Power-Limited ML Inference Clusters
inferred← citeshttps://doi.org/10.1109/islped58423.2023.10244486openalex-snapshot
Uncertainty-Aware Online Learning for Dynamic Power Management in Large Manycore Systems
inferred← citeshttps://doi.org/10.1109/islped65674.2025.11261702openalex-snapshot
ML-Power: Machine Learning based Power Estimation for SoCs
inferred← citeshttps://doi.org/10.1109/ispass.2016.7482070openalex-snapshot
DVFS performance prediction for managed multithreaded applications
inferred← citeshttps://doi.org/10.1109/ispass.2019.00038openalex-snapshot
RPPM: Rapid Performance Prediction of Multithreaded Workloads on Multicore Processors
inferred← citeshttps://doi.org/10.1109/isvlsi.2016.60openalex-snapshot
Workload-Aware Power Gating Design and Run-Time Management for Massively Parallel GPGPUs
inferred← citeshttps://doi.org/10.1109/jsyst.2015.2499307openalex-snapshot
PoweRock: Power Modeling and Flexible Dynamic Power Management for Many-Core Architectures
inferred← citeshttps://doi.org/10.1109/lca.2016.2616339openalex-snapshot
Mind The Power Holes: Sifting Operating Points in Power-Limited Heterogeneous Multicores
inferred← citeshttps://doi.org/10.1109/nas.2016.7549399openalex-snapshot
Dynamic Power-Performance Adjustment on Clustered Multi-Threading Processors
inferred← citeshttps://doi.org/10.1109/patmos.2016.7833420openalex-snapshot
Thermally-aware composite run-time CPU power models
inferred← citeshttps://doi.org/10.1109/rtcsa58653.2023.00016openalex-snapshot
Memory-Aware DVFS Governing Policy for Improved Energy-Saving in the Linux Kernel
inferred← citeshttps://doi.org/10.1109/sbac-pad.2016.27openalex-snapshot
REPP-H: Runtime Estimation of Power and Performance on Heterogeneous Data Centers
inferred← citeshttps://doi.org/10.1109/tc.2016.2609903openalex-snapshot
DEP+BURST: Online DVFS Performance Prediction for Energy-Efficient Managed Language Execution
inferred← citeshttps://doi.org/10.1109/tc.2017.2770126openalex-snapshot
Simultaneous and Speculative Thread Migration for Improving Energy Efficiency of Heterogeneous Core Architectures
inferred← citeshttps://doi.org/10.1109/tc.2020.2975787openalex-snapshot
PARMA: Parallelization-Aware Run-Time Management for Energy-Efficient Many-Core Systems
inferred← citeshttps://doi.org/10.1109/tcad.2016.2562920openalex-snapshot
Accurate and Stable Run-Time Power Modeling for Mobile and Embedded CPUs
inferred← citeshttps://doi.org/10.1109/tcad.2019.2902355openalex-snapshot
LoCool: Fighting Hot Spots Locally for Improving System Energy Efficiency
inferred← citeshttps://doi.org/10.1109/tcad.2020.3013062openalex-snapshot
A Lightweight Nonlinear Methodology to Accurately Model Multicore Processor Power
inferred← citeshttps://doi.org/10.1109/tpds.2020.3013948openalex-snapshot
Rusty: Runtime Interference-Aware Predictive Monitoring for Modern Multi-Tenant Systems
inferred← citeshttps://doi.org/10.1109/tpds.2026.3712610openalex-snapshot
Compute Overlap Stall (COS): Predicting Performance of Power Management for Shared Memory Codes When Throttling Processors, Memory, and Thread Concurrency
inferred← citeshttps://doi.org/10.1109/tvlsi.2026.3663564openalex-snapshot
Efficient SoC Power Estimation With Machine Learning
inferred← citeshttps://doi.org/10.1145/2742854.2742868openalex-snapshot
TaPEr
inferred← citeshttps://doi.org/10.1145/2835177openalex-snapshot
A Framework for Application-Guided Task Management on Heterogeneous Embedded Systems
inferred← citeshttps://doi.org/10.1145/2837023openalex-snapshot
TSocket
inferred← citeshttps://doi.org/10.1145/3014165openalex-snapshot
Selecting Heterogeneous Cores for Diversity
inferred← citeshttps://doi.org/10.1145/3037697.3037717openalex-snapshot
Voltage Regulator Efficiency Aware Power Management
inferred← citeshttps://doi.org/10.1145/3093315.3037717openalex-snapshot
Voltage Regulator Efficiency Aware Power Management
inferred← citeshttps://doi.org/10.1145/3093336.3037717openalex-snapshot
Voltage Regulator Efficiency Aware Power Management
inferred← citeshttps://doi.org/10.1145/3093337.3037717openalex-snapshot
Voltage Regulator Efficiency Aware Power Management
inferred← citeshttps://doi.org/10.1145/3148053openalex-snapshot
SLOOP
inferred← citeshttps://doi.org/10.1145/3170433openalex-snapshot
A Case for a More Effective, Power-Efficient Turbo Boosting
inferred← citeshttps://doi.org/10.1145/3173162.3173199openalex-snapshot
SPECTR
inferred← citeshttps://doi.org/10.1145/3195970.3196122openalex-snapshot
STAFF
inferred← citeshttps://doi.org/10.1145/3240765.3243484openalex-snapshot
Machine learning for performance and power modeling of heterogeneous systems
inferred← citeshttps://doi.org/10.1145/3296957.3173199openalex-snapshot
SPECTR
inferred← citeshttps://doi.org/10.1145/3337821.3337865openalex-snapshot
SaC
inferred← citeshttps://doi.org/10.1145/3352460.3358285openalex-snapshot
Tangram
inferred← citeshttps://doi.org/10.1145/3494537openalex-snapshot
Task-RM: A Resource Manager for Energy Reduction in Task-Parallel Applications under Quality of Service Constraints
inferred← citeshttps://doi.org/10.1145/3559762openalex-snapshot
TokenSmart: Distributed, Scalable Power Management in the Many-core Era
inferred← citeshttps://doi.org/10.1145/3603501openalex-snapshot
Dynamic Power Management in Large Manycore Systems: A Learning-to-Search Framework
inferred← citeshttps://doi.org/10.1145/3623278.3624756openalex-snapshot
Predict; Don't React for Enabling Efficient Fine-Grain DVFS in GPUs
inferred← citeshttps://doi.org/10.1145/3676641.3715995openalex-snapshot
Energy-aware Scheduling and Input Buffer Overflow Prevention for Energy-harvesting Systems
inferred← citeshttps://doi.org/10.1145/3711836openalex-snapshot
RAD-FS: Remote Timing and Power SCA Security in DVFS-augmented Ultra-Low-Power Embedded Systems
inferred← citeshttps://doi.org/10.1145/3810247openalex-snapshot
CML-PowF: Data Clustering Matching Based Low-overhead Multiple CPU Real-time Power Forecasting
inferred← citeshttps://doi.org/10.12794/metadc1505199openalex-snapshot
Methodical Evaluation of Processing-in-Memory Alternatives
inferred← citeshttps://doi.org/10.1587/elex.12.20150489openalex-snapshot
Floorplanner for multi-core micro-processors in 3D ICs with interlayer cooling system
inferred← citeshttps://doi.org/10.1587/elex.12.20150970openalex-snapshot
Thermal optimal task allocation algorithm for multi-core 3D IC with interlayer cooling system
inferred← citeshttps://doi.org/10.17760/d20262473openalex-snapshot
Energy efficient execution of heterogeneous applications
inferred← citeshttps://doi.org/10.22360/springsim.2016.hpc.003openalex-snapshot
A Framework for Evaluating Promising Power Efficiency Techniques in Future GPUs for HPC
inferred← citeshttps://doi.org/10.23919/date.2018.8342104openalex-snapshot
Airavat: Improving energy efficiency of heterogeneous applications
inferred← citeshttps://doi.org/10.4018/978-1-7998-7156-9.ch004openalex-snapshot
Intelligent Management of Mobile Systems Through Computational Self-Awareness
Editorial review for independent work. ICSAC — the Institute for Complexity Science and Advanced Computing — runs a structured editorial panel for researchers publishing outside journals, and publishes on CiteStamp rails. Submission is free and goes through ORCID: icsacinstitute.org/submit.