On the public citation graph
Short-Circuiting Memory Traffic in Handheld Platforms
0 signed · 59 inferred · view as graph
Inferred edges come from two machine sources: sweeps of open repository metadata (mostly SSRN and Zenodo), and a bulk OpenAlex citation snapshot. Every row below is labelled with the one it came from. Neither is a complete citation index — absence here is not evidence of absence.
Is this your work? Sign in with ORCID and put your name on the
claims that are yours.
Reference health. See whether every reference in this work resolves to a
known work and none has been retracted — and get a dated CiteStamped
badge you can embed.
What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1016/j.sysarc.2010.04.007openalex-snapshot
Communication-aware heuristics for run-time task mapping on NoC-based MPSoC platforms
inferredcites →https://doi.org/10.1109/aspdac.2004.1337707openalex-snapshot
A compressed frame buffer to reduce display power consumption in mobile systems
inferredcites →https://doi.org/10.1109/dac.2002.1012623openalex-snapshot
Exploiting shared scratch pad memory space in embedded multiprocessor systems
inferredcites →https://doi.org/10.1109/date.2007.364540openalex-snapshot
Temperature Aware Task Scheduling in MPSoCs
inferredcites →https://doi.org/10.1109/hotchips.2011.7477510openalex-snapshot
Power management architecture of the 2nd generation Intel® Core microarchitecture, formerly codenamed Sandy Bridge
inferredcites →https://doi.org/10.1109/hpca.2010.5416658openalex-snapshot
ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers
inferredcites →https://doi.org/10.1109/hpca.2013.6522303openalex-snapshot
High-performance and energy-efficient mobile web browsing on big/little systems
inferredcites →https://doi.org/10.1109/icpads.2006.102openalex-snapshot
SPM conscious loop scheduling for embedded chip multiprocessors
inferredcites →https://doi.org/10.1109/iedm.2009.5424433openalex-snapshot
GPU technology trends and future requirements
inferredcites →https://doi.org/10.1109/iiswc.2011.6114205openalex-snapshot
Full-system analysis and characterization of interactive smartphone applications
inferredcites →https://doi.org/10.1109/islped.2013.6629321openalex-snapshot
A hybrid display frame buffer architecture for energy efficient display subsystems
inferredcites →https://doi.org/10.1109/isscc.2011.5746311openalex-snapshot
A fully integrated multi-CPU, GPU and memory controller 32nm processor
inferredcites →https://doi.org/10.1109/isvlsi.2005.32openalex-snapshot
Exploiting Inter-Processor Data Sharing for Improving Behavior of Multi-Processor SoCs
inferredcites →https://doi.org/10.1109/jproc.2006.873611openalex-snapshot
System-on-Chip: Reuse and Integration
inferredcites →https://doi.org/10.1109/l-ca.2011.4openalex-snapshot
DRAMSim2: A Cycle Accurate Memory System Simulator
inferredcites →https://doi.org/10.1109/micro.2005.29openalex-snapshot
Scalable Store-Load Forwarding via Store Queue Index Prediction
inferredcites →https://doi.org/10.1109/micro.2010.51openalex-snapshot
Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior
inferredcites →https://doi.org/10.1109/mm.2003.1196116openalex-snapshot
The AMD opteron processor for multiprocessor servers
inferredcites →https://doi.org/10.1109/mm.2010.31openalex-snapshot
Cache Hierarchy and Memory Subsystem of the AMD Opteron Processor
inferredcites →https://doi.org/10.1109/tcsvt.2007.905532openalex-snapshot
Overview of the Scalable Video Coding Extension of the H.264/AVC Standard
inferredcites →https://doi.org/10.1145/1176760.1176809openalex-snapshot
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
inferredcites →https://doi.org/10.1145/1250662.1250699openalex-snapshot
Limiting the power consumption of main memory
inferredcites →https://doi.org/10.1145/1644893.1644927openalex-snapshot
Energy consumption in mobile phones
inferredcites →https://doi.org/10.1145/1791212.1791244openalex-snapshot
Markov-optimal sensing policy for user state estimation in mobile devices
inferredcites →https://doi.org/10.1145/2039370.2039390openalex-snapshot
Mapping of applications to MPSoCs
inferredcites →https://doi.org/10.1145/2155620.2155677openalex-snapshot
A data layout optimization framework for NUCA-based multicores
inferredcites →https://doi.org/10.1145/2228360.2228513openalex-snapshot
A QoS-aware memory controller for dynamically balancing GPU and CPU bandwidth use in an MPSoC
inferredcites →https://doi.org/10.1145/263699.263719openalex-snapshot
Maximizing parallelism and minimizing synchronization with affine transforms
inferredcites →https://doi.org/10.1145/301618.301668openalex-snapshot
New tiling techniques to improve cache temporal locality
inferredcites →https://doi.org/10.1145/301631.301668openalex-snapshot
New tiling techniques to improve cache temporal locality
inferredcites →https://doi.org/10.1145/513918.513974openalex-snapshot
Exploiting shared scratch pad memory space in embedded multiprocessor systems
inferredcites →https://doi.org/10.1145/605397.605428openalex-snapshot
A stream compiler for communication-exposed architectures
inferredcites →https://doi.org/10.5555/2648668.2648751openalex-snapshot
A hybrid display frame buffer architecture for energy efficient display subsystems
inferredcites →https://doi.org/10.5555/844174.844187openalex-snapshot
Texture compression using low-frequency signal modulation
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1109/hpca.2016.7446054openalex-snapshot
Mobile CPU's rise to power: Quantifying the impact of generational mobile CPU design trends on performance, energy, and user satisfaction
inferred← citeshttps://doi.org/10.1109/hpca57654.2024.00084openalex-snapshot
RELIEF: Relieving Memory Pressure In SoCs Via Data Movement-Aware Accelerator Scheduling
inferred← citeshttps://doi.org/10.1109/ipdps47924.2020.00012openalex-snapshot
Neksus: An Interconnect for Heterogeneous System-In-Package Architectures
inferred← citeshttps://doi.org/10.1109/micro.2016.7783751openalex-snapshot
Co-designing accelerators and SoC interfaces using gem5-Aladdin
inferred← citeshttps://doi.org/10.1109/micro50266.2020.00087openalex-snapshot
Mesorasi: Architecture Support for Point Cloud Analytics via Delayed-Aggregation
inferred← citeshttps://doi.org/10.1109/micro50266.2020.00089openalex-snapshot
Building the Computing System for Autonomous Micromobility Vehicles: Design Constraints and Architectural Optimizations
inferred← citeshttps://doi.org/10.1109/tcad.2025.3553074openalex-snapshot
SaaP: Rearchitect SoC-as-a-Processor to Orchestrate Hardware Heterogeneity
inferred← citeshttps://doi.org/10.1145/3123939.3123948openalex-snapshot
Race-to-sleep + content caching + display caching
inferred← citeshttps://doi.org/10.1145/3352460.3358298openalex-snapshot
Distilling the Essence of Raw Video to Reduce Memory Usage and Energy at Edge Devices
inferred← citeshttps://doi.org/10.1145/3466752.3480085openalex-snapshot
BurstLink: Techniques for Energy-Efficient Video Display for Conventional and Virtual Reality Systems
inferred← citeshttps://doi.org/10.1145/3676536.3697112openalex-snapshot
Dataflow Accelerator Architecture for Autonomous Machine Computing
inferred← citeshttps://doi.org/10.1587/elex.16.20190351openalex-snapshot
IP-aware cache partition and replacement scheme for mobile computing devices
inferred← citeshttps://doi.org/10.2200/s01101ed1v01y202105cac056openalex-snapshot
Robotic Computing on FPGAs
inferred← citeshttps://doi.org/10.48550/arxiv.2104.05119openalex-snapshot
BurstLink: Techniques for Energy-Efficient Conventional and Virtual Reality Video Display
Editorial review for independent work. ICSAC — the Institute for Complexity
Science and Advanced Computing — runs a structured editorial panel for researchers
publishing outside journals, and publishes on CiteStamp rails. Submission is free
and goes through ORCID: icsacinstitute.org/submit.