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Estimating Performance of a Ray-Tracing ASIC Design
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/bf01900835openalex-snapshot
Stochastic Ray Tracing Using SIMD Processor Arrays
inferredcites →https://doi.org/10.1007/bf01901067openalex-snapshot
A highly flexible multiprocessor solution for ray tracing
inferredcites →https://doi.org/10.1080/10867651.1997.10487468openalex-snapshot
Fast, Minimum Storage Ray-Triangle Intersection
inferredcites →https://doi.org/10.1109/pvgs.2003.1249045openalex-snapshot
Distributed interactive ray tracing of dynamic scenes
inferredcites →https://doi.org/10.1109/rt.2006.280210openalex-snapshot
Ray Tracing on the Cell Processor
inferredcites →https://doi.org/10.1111/1467-8659.00508openalex-snapshot
Interactive Rendering with Coherent Ray Tracing
inferredcites →https://doi.org/10.1145/1058129.1058143openalex-snapshot
Realtime ray tracing of dynamic scenes on an FPGA chip
inferredcites →https://doi.org/10.1145/1071866.1071869openalex-snapshot
KD-tree acceleration structures for a GPU raytracer
inferredcites →https://doi.org/10.1145/1141911.1141913openalex-snapshot
Ray tracing animated scenes using coherent grid traversal
inferredcites →https://doi.org/10.1145/1179352.1141913openalex-snapshot
Ray tracing animated scenes using coherent grid traversal
inferredcites →https://doi.org/10.1145/1283900.1283912openalex-snapshot
B-KD trees for hardware accelerated ray tracing of dynamic scenes
inferredcites →https://doi.org/10.1145/1468075.1468082openalex-snapshot
Some techniques for shading machine renderings of solids
inferredcites →https://doi.org/10.1145/311535.311563openalex-snapshot
The VolumePro real-time ray-casting system
inferredcites →https://doi.org/10.1145/358876.358882openalex-snapshot
An improved illumination model for shaded display
inferredcites →https://doi.org/10.22028/d291-25785openalex-snapshot
Realtime ray tracing and interactive global illumination
inferredcites →https://doi.org/10.2312/egs.20011018openalex-snapshot
Towards Rapid Reconstruction for Animated Ray Tracing
inferredcites →https://doi.org/10.2312/egwr/egwr03/074-081openalex-snapshot
Interactive Global Illumination in Complex and Highly Occluded Environments
inferredcites →https://doi.org/10.2312/osg.20031416openalex-snapshot
The OpenRT Application Programming Interface - Towards A Common API for Interactive Ray Tracing
inferredcites →https://doi.org/10.5555/569046.569051openalex-snapshot
SaarCOR: a hardware architecture for ray tracing
inferredcites →https://doi.org/10.7551/mitpress/2319.001.0001openalex-snapshot
The Definition of Standard ML
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
inferred← citeshttps://doi.org/10.1007/s00371-007-0123-xopenalex-snapshot
The photon pipeline revisited
inferred← citeshttps://doi.org/10.1016/j.cag.2008.01.007openalex-snapshot
Fast ray tracing and the potential effects on graphics and gaming courses
inferred← citeshttps://doi.org/10.1016/j.cag.2013.10.024openalex-snapshot
Effective traversal algorithms and hardware architecture for pyramidal inverse displacement mapping
inferred← citeshttps://doi.org/10.1109/asap.2011.6043263openalex-snapshot
Accelerating the photon mapping algorithm and its hardware implementation
inferred← citeshttps://doi.org/10.1109/asscc.2008.4708758openalex-snapshot
A 2.88mm2 50M-intersections/s ray-triangle intersection unit for interactive ray tracing
inferred← citeshttps://doi.org/10.1109/iccd.2007.4601897openalex-snapshot
Multi-core data streaming architecture for ray tracing
inferred← citeshttps://doi.org/10.1109/iccd.2010.5647555openalex-snapshot
Efficient MIMD architectures for high-performance ray tracing
inferred← citeshttps://doi.org/10.1109/jssc.2011.2171417openalex-snapshot
MRTP: Mobile Ray Tracing Processor With Reconfigurable Stream Multi-Processors for High Datapath Utilization
inferred← citeshttps://doi.org/10.1109/micro.2008.4771789openalex-snapshot
Toward a multicore architecture for real-time ray-tracing
inferred← citeshttps://doi.org/10.1109/rt.2008.4634642openalex-snapshot
Hardware architecture design and implementation of ray-triangle intersection with bounding volume hierarchies
inferred← citeshttps://doi.org/10.1109/sasp.2008.4570794openalex-snapshot
TRaX: A Multi-Threaded Architecture for Real-Time Ray Tracing
inferred← citeshttps://doi.org/10.1109/sasp.2010.5521150openalex-snapshot
A hardware pipeline for accelerating ray traversal algorithms on streaming processors
inferred← citeshttps://doi.org/10.1109/tcad.2009.2028981openalex-snapshot
TRaX: A Multicore Hardware Architecture for Real-Time Ray Tracing
inferred← citeshttps://doi.org/10.1109/tcsi.2012.2209302openalex-snapshot
A Reconfigurable SIMT Processor for Mobile Ray Tracing With Contention Reduction in Shared Memory
inferred← citeshttps://doi.org/10.1109/tvcg.2014.2371855openalex-snapshot
HART: A Hybrid Architecture for Ray Tracing Animated Scenes
inferred← citeshttps://doi.org/10.1109/tvcg.2020.3021048openalex-snapshot
Mach-RT: A Many Chip Architecture for High Performance Ray Tracing
inferred← citeshttps://doi.org/10.1145/1268517.1268547openalex-snapshot
Packet-based whitted and distribution ray tracing
inferred← citeshttps://doi.org/10.1145/1282040.1282056openalex-snapshot
Rethinking graphics and gaming courses because of fast ray tracing
inferred← citeshttps://doi.org/10.1145/3105762.3105771openalex-snapshot
Dual streaming for hardware-accelerated ray tracing
inferred← citeshttps://doi.org/10.1145/3406185openalex-snapshot
Hardware-Accelerated Dual-Split Trees
inferred← citeshttps://doi.org/10.2312/hpg.20161190openalex-snapshot
Watertight Ray Traversal with Reduced Precision
inferred← citeshttps://doi.org/10.2312/localchapterevents/tpcg/tpcg09/101-108openalex-snapshot
Design and Evaluation of a Hardware Accelerated Ray Tracing Data Structure
inferred← citeshttps://doi.org/10.26053/0h-mghs-0t00openalex-snapshot
Ray tracing from a data movement perspective
inferred← citeshttps://doi.org/10.31274/etd-180810-2363openalex-snapshot
A Hardware-Software Integrated Solution for Improved Single-Instruction Multi-Thread Processor Efficiency
inferred← citeshttps://doi.org/10.5753/wscad.2020.14061openalex-snapshot
Uma Vetorização Eficiente para o Algoritmo de Interseção Raio-Triângulo nas Arquiteturas Multicore
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