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Receptive process theory
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
inferredcites →https://doi.org/10.1007/3-540-10235-3openalex-snapshot
A Calculus of Communicating Systems
inferredcites →https://doi.org/10.1007/978-1-4471-3544-9_8openalex-snapshot
The Design of a Delay-Insensitive Stack
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A formal model for defining and classifying delay-insensitive circuits and systems
inferredcites →https://doi.org/10.1007/bfb0023748openalex-snapshot
An algebra for delay-insensitive circuits
inferredcites →https://doi.org/10.1007/bfb0039070openalex-snapshot
Delay-insensitive circuits: An algebraic approach to their design
inferredcites →https://doi.org/10.1016/0141-9331(86)90196-1openalex-snapshot
Communicating sequential processes
inferredcites →https://doi.org/10.1016/0167-6423(90)90076-popenalex-snapshot
Communication and concurrency
inferredcites →https://doi.org/10.1016/0304-3975(88)90049-7openalex-snapshot
The laws of OCCAM programming
inferredcites →https://doi.org/10.1049/ip-i-1.1981.0010openalex-snapshot
Introduction to V.L.S.I. Systems
inferredcites →https://doi.org/10.1090/dimacs/003/12openalex-snapshot
An algebra for delay-insensitive circuits
inferredcites →https://doi.org/10.1145/357980.358021openalex-snapshot
Communicating sequential processes
inferredcites →https://doi.org/10.1145/359576.359585openalex-snapshot
Communicating sequential processes
inferredcites →https://doi.org/10.6100/ir25052openalex-snapshot
Classification and composition of delay-insensitive circuits
inferredcites →https://doi.org/10.7551/mitpress/6874.001.0001openalex-snapshot
Trace Theory for Automatic Hierarchical Verification of Speed-Independent Circuits
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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Quiescence, fairness, testing, and the notion of implementation
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An exercise in the automatic verification of asynchronous designs
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High-level optimizations in compiling process descriptions to asynchronous circuits
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Formal derivation of a loadable asynchronous counter
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A process algebraic view of input/output automata
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Visual methods in real-time programming
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Modelling and verification of delay-insensitive circuits using CCS and the Concurrency Workbench
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Metrics for labelled Markov processes
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Controllable Delay-Insensitive Processes and their Reflection, Interaction and Factorisation
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Verification of speed-dependences in single-rail handshake circuits
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Design and implementation of Triveni: a process-algebraic API for threads + events
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