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A Scheduling Discipline for Latency and Bandwidth Guarantees in Asynchronous Network-on-Chip
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What this work says
Outgoing claims: the papers this work cites, builds on, or argues with.
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Performance Evaluation
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Networks on chips: a new SoC paradigm
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Service disciplines for guaranteed performance service in packet-switching networks
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Globally-asynchronous locally-synchronous architectures to simplify the design of on-chip systems
inferredcites →https://doi.org/10.1109/date.2003.1253633openalex-snapshot
Trade offs in the design of a router with both guaranteed and best-effort services for networks on chip
inferredcites →https://doi.org/10.1109/date.2004.1269001openalex-snapshot
Guaranteed bandwidth using looped containers in temporally disjoint networks within the nostrum network on chip
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A Router Architecture for Connection-Oriented Service Guarantees in the MANGO Clockless Network-on-Chip
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Flit-reservation flow control
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An asynchronous low latency arbiter for Quality of Service (QoS) applications
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Rate-controlled static-priority queueing
inferredcites →https://doi.org/10.1109/isca.2004.1310774openalex-snapshot
Low-latency virtual-channel routers for on-chip networks
inferredcites →https://doi.org/10.1109/norchp.2004.1423875openalex-snapshot
Virtual channel designs for guaranteeing bandwidth in asynchronous network-on-chip
inferredcites →https://doi.org/10.1109/socc.2004.1362432openalex-snapshot
An asynchronous on-chip network router with quality-of-service (QoS) support
inferredcites →https://doi.org/10.1145/1028176.1006717openalex-snapshot
Low-Latency Virtual-Channel Routers for On-Chip Networks
inferredcites →https://doi.org/10.13140/rg.2.1.4128.7843openalex-snapshot
Globally-Asynchronous Locally-Synchronous Systems
inferredcites →https://doi.org/10.5555/789083.1022751openalex-snapshot
Trade Offs in the Design of a Router with Both Guaranteed and Best-Effort Services for Networks on Chip
What points at this work
Incoming claims: where this work appears in other papers’ reference lists and arguments.
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Demystifying Data-Driven and Pausible Clocking Schemes
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Packetizing OCP Transactions in the MANGO Network-on-Chip
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Router Designs for an Asynchronous Time-Division-Multiplexed Network-on-Chip
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Wrapper Design for the Reuse of Networks-on-Chip as Test Access Mechanism
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